Sierra Circuit Certification

Getting control of your impedance requires design and manufacturing expertise

High-speed designs are more commonplace and the impact on the performance is becoming greater and greater. As a PCB designer, you need to know what nets require controlled impedance, how to avoid common mistakes when designing, what to specify in the fabrication drawing, how to design controlled impedance traces, how to get a stack-up from your manufacturer, as well as make sure they can meet your requirements.

This design guide empowers designers: the purpose is to get you on the advanced side of controlled impedance.

Why choosing Sierra Circuits for
your controlled impedance

    1. 1. When you request controlled impedance, our planning department creates an impedance stack-up. We put in your values and adjust them according to suitability with manufacturing. We control the impedance through dielectric thicknesses, trace width and space.

    1. 2. We perform a test to make sure we achieved the desired impedance using TDR coupons. First articles are processed in order to evaluate any discrepancies before an entire order is committed. Adjustments are made depending upon results from the first article to meet the customer’s needs and manufacture boards within the specified tolerance.

    1. 3. How do we ensure that you get what you are asking for? We perform cross-section analysis of the panel and measure the relevant thickness. This ensures a good connection to the inner layers and also the copper wrap is even throughout the hole.

  1. 4. A typical tolerance on final impedance is +/-10%. But Sierra is able to do +/-5% impedance tolerance.

When and why you need controlled impedance

Typically, you will need controlled impedance for PCBs used in high-speed digital applications, such as RF communication, telecommunications, computing using signal frequencies above 100MHz high-speed signal processing, and high-quality video, such as DDR, HDMI, Gigabit Ethernet, etc.

At high-frequency, the signal traces on a PCB act like transmission lines, which have impedance at each point on the signal trace trajectory. If this impedance varies from one point to the next one, there will be a signal reflection whose magnitude will depend on the difference between the two impedances. The larger the difference is, the greater the reflection will be. This reflection will travel in the opposite direction of the signal, which means that the reflected signal will superimpose on the main signal. As a result, the original signal will be distorted: the signal intended to be sent from the transmitter side would have changed once it got to the receiver side. The distortion may be so much that the signal may not be able to perform the desired function. Therefore, to have an undistorted signal travel, it is essential that the PCB signal traces have a uniform controlled impedance to minimize signal distortions caused by reflections. This is the first step to improve the integrity of the signals on the PCB traces.


What affects impedance

In summary, the impedance of PCB signal traces is affected by:

  • The height of the dielectric layer between the signal trace and the reference plane
  • The width and the thickness of the signal trace
  • The dielectric constant of a dielectric material

Dielectric materials used in PCB constructions are categorized in two types: copper clad cores and prepregs. The various types of cores and the prepregs usually have different dielectric constants, as specified in the detailed data available from the laminate manufacturer.


Stack-up design

The stack-up is very crucial for the design of a controlled impedance PCB. Designers need to create a stack-up for the board and then calculate the trace values for differential pairs and single-ended nets. Designers can perform these tasks by themselves or can ask their fabrication partners to provide these services.

To calculate the values, designers need to know the following information:

  • Number of board layers
  • Layers on which to route controlled impedance traces
  • Layers to use as reference layers
  • PCB materials used and copper thicknesses on various layers
  • Dielectric constant and dielectric height (when modeling yourself, it is a good idea to use a 4-mil dielectric height for inner layers and 3 mils for outer layers)

Common design mistakes to avoid

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    Maintain symmetry in differential pair routing

    High-speed differential pair signal traces need to be routed parallel to each other with a constant spacing between them. The specific trace width and the spacing are required to calculate the particular differential impedance. The differential pairs need to be routed symmetrically. You should minimize areas where the specified spacing is enlarged due to pads or the ends.

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    Placement of components, vias, and coupling capacitors

    Components or vias should not be placed between differential pairs, even if the signals are routed symmetrically around them. Components and vias create a discontinuity in impedance and could lead to signal integrity problems. For high-speed signals, the spacing between one differential pair and an adjacent differential pair should not be less than five times the width of the trace (5W).

Take a peek at what’s inside the design guide

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